st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 320

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
Electrical characteristics
12.4.5
12.5
12.5.1
320/371
On-chip peripherals
Table 196. On-chip peripherals
1. Data based on a differential I
2. Data based on a differential I
3. Data based on a differential I
4. Data based on a differential I
5. Data based on a differential I
6. Data based on a differential I
7. Data based on a differential measurement between reset configuration (op-amp disabled) and amplification
Clock and timing characteristics
Subject to general operating conditions for V
General timings
Table 197. General timings
1. Data based on typical application software
2. Time measured between interrupt event and interrupt vector fetch.
I
DD(op-amp)
Symbol
I
I
I
I
I
I
DD(MTC)
DD(ADC)
Symbol
DD(ART)
DD(TIM)
DD(SPI)
DD(SCI)
t
f
counter enable (only TCE bit set)
SPI master communication at maximum speed (data sent equal to 55h). This measurement includes the
pad toggling consumption.
SCI data transmit sequence.
whole motor control cell enable in speed measurement mode. MCO outputs are not validated.
conversions.
of a sinewave (no load, A
needed to finish the current instruction execution.
CPU
c(INST)
t
v(IT)
/4) and timer counter stopped (only TIMD bit set). Data valid for one timer.
16-bit Timer supply current
ART PWM supply current
SPI supply current
SCI supply current
MTC supply current
ADC supply current when converting
Op-amp supply current
Instruction cycle time
Interrupt reaction time
t
v(IT)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
= t
c(INST)
VCL
Parameter
Parameter
DD
DD
DD
DD
DD
DD
= 1, V
+ 10
measurement between reset configuration (SPI disabled) and a permanent
measurement between reset configuration (motor control disabled) and the
(3)
(4)
measurement between reset configuration (timer counter running at
measurement between reset configuration (timer stopped) and timer
measurement between SCI low power state (SCID
measurement between reset configuration and continuous A/D
(5)
DD
(7)
(2)
= 5V).
(2)
(1)
DD
(6)
f
f
, f
CPU
CPU
OSC
Conditions
f
f
f
= 8 MHz
= 8 MHz
CPU
ADC
CPU
, and T
=
=
=
8 MHz
4 MHz
8 MHz
Conditions
t
c(INST)
A
.
is the number of t
V
1.25
Min
250
DD
10
2
=
=
5.0V
1) and a permanent
Typ
375
3
(1)
CPU
1500
Typ
400
400
500
400
50
75
1500
Max
2.75
12
22
cycles
Unit
µA
Unit
t
t
CPU
CPU
ns
µs

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