st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 231

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
A logic block manages capture operations depending on the sensor type. A capture is
initiated on an active edge (‘tacho capture’ event) when using a tachogenerator.
If an encoder is used, the capture is triggered on two events depending on the encoder
capture mode bit (ECM) in the MZFR register:
The clock source of the counter is selected depending on sensor type:
In order to optimize the accuracy of the measurement for a wide speed range, the auto-
updated prescaler functionality is used with slight modifications compared to
sensor/sensorless modes (refer to
The only automatically updated registers for the speed sensor mode are MTIM and MTIML.
Access to delay manager registers in speed sensor mode is summarized in
Reading the MSB of the counter in manual mode (ECM = 1)
Interrupt from the real time clock in automatic mode (ECM = 0)
Motor control peripheral clock (16 MHz) with tachogenerator or hall sensors
Encoder clock
When the [MTIM:MTIML] timer value reaches FFFFh, the prescaler is automatically
incremented in order to slow down the counter and avoid an overflow. To keep
consistent values, the MTIM and MTIML registers are shifted right (divided by two). The
RPI bit in the MISR register is set and an interrupt is generated (if RIM is set).
When a capture event occurs, if the [MTIM:MTIML] timer value is below 5500h, the
prescaler is automatically decremented in order to speed up the counter and keep
precision better than 0.005% (1/5500h). The MTIM and MTIML registers are shifted left
(multiplied by two). The RMI bit in the MISR register is set and an interrupt is generated
if RIM is set.
If the prescaler contents reach the value 0, it can no longer be automatically
decremented, the [MTIM:MTIML] timer continues working with the same prescaler
value, that is, with a lower accuracy. No RMI interrupt can be generated.
If the prescaler contents reach the value 15, it can no longer be automatically
incremented. When the timer reaches the value FFFFh, the prescaler and all the
relevant registers remain unchanged and no interrupt is generated, the timer clock is
disabled, and its contents stay at FFFFh. The capture logic block still works, enabling
the capture of the maximum timer value.
Figure 104
and
Table
96).
On-chip peripherals
Table
99.
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