st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 96

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
On-chip peripherals
Figure 36. PWM auto-reload timer function
Figure 37. PWM signal from 0% to 100% duty cycle
Output compare and time base interrupt
On overflow, the OVF flag of the ARTCSR register is set and an overflow interrupt request is generated if
the overflow interrupt enable bit, OIE, in the ARTCSR register, is set. The OVF flag must be reset by the
user software. This interrupt can be used as a time base in the application.
External clock and event detector mode
Using the f
event detector. In this mode, the ARTARR register is used to select the n
counted before setting the OVF flag.
n
Caution:
96/371
EVENT
PWMx output
with OEx = 1
and OPx = 0
= 256 - ARTARR
With OEx = 1
With OEx = 1
and OPx = 1
(PWMDCRx)
and OPx = 0
Auto-reload
(ARTARR)
Duty cycle
EXT
register
register
The external clock function is not available in Halt mode. If Halt mode is used in the
application, prior to executing the HALT instruction, the counter must be disabled by clearing
the TCE bit in the ARTCSR register to avoid spurious counter increments.
external prescaler input clock, the auto-reload timer can be used as an external clock
OCRx = FCh
OCRx = FDh
OCRx = FEh
OCRx = FFh
255
000
f
COUNTER
Counter
FDh
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
FEh
ARTARR = FDh
FFh
FDh
FEh
EVENT
FFh
number of events to be
FDh
FEh
t
t

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