st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 154

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

On-chip peripherals
154/371
Table 63.
Bit Name
7
6
5
4
3
2
1
0
WAKE
SCID
PCE
PIE
PS
R8
T8
M
Receive data bit 8
Transmit data bit 8
Disabled for low power consumption
Word length
Wake-up method
Parity control enable
Parity selection
Parity interrupt enable
SCICR1 register description
This bit is used to store the 9th bit of the received word when M = 1.
This bit is used to store the 9th bit of the transmitted word when M = 1.
When this bit is set the SCI prescalers and outputs are stopped at the end of the
current byte transfer in order to reduce power consumption.This bit is set and cleared
by software.
0: SCI enabled
1: SCI prescaler and outputs disabled
This bit determines the word length. It is set or cleared by software.
0: 1 start bit, 8 data bits, 1 stop bit
1: 1 start bit, 9 data bits, 1 stop bit
Note: The M bit must not be modified during a data transfer (both transmission and
reception).
This bit determines the SCI wake-up method. It is set or cleared by software.
0: Idle line
1: Address mark
Note: If the LINE bit is set, the WAKE bit is deactivated and replaced by the LHDM bit.
This bit is set and cleared by software. It selects the hardware parity control
(generation and detection for byte parity, detection only for LIN parity).
0: Parity control disabled
1: Parity control enabled
This bit selects the odd or even parity when the parity generation/detection is enabled
(PCE bit set). It is set and cleared by software. The parity is selected after the current
byte.
0: Even parity
1: Odd parity
This bit enables the interrupt capability of the hardware parity control when a parity
error is detected (PE bit set). The parity error involved can be a byte parity error (if bit
PCE is set and bit LPE is reset) or a LIN parity error (if bit PCE is set and bit LPE is
set).
0: Parity error interrupt disabled
1: Parity error interrupt enabled
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Function