st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 147

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Note:
Framing error
A framing error is detected when:
When the framing error is detected:
The FE bit is reset by a SCISR register read operation followed by a SCIDR register read
operation.
Break character
When a break character is received, the SCI handles it as a framing error. To differentiate a
break character from a framing error, it is necessary to read the SCIDR. If the received value
is 00h, it is a break character. Otherwise it is a framing error.
Conventional baud rate generation
The baud rates for the receiver and transmitter (Rx and Tx) are set independently and
calculated as follows:
Equation 7
where
PR = 1, 3, 4 or 13 (see
TR = 1, 2, 4, 8, 16, 32, 64,128 (see
bits)
RR = 1, 2, 4, 8, 16, 32, 64,128 (see
SCR[2:0] bits)
Example: If f
receive baud rates are 38400 baud.
The baud rate registers MUST NOT be changed while the transmitter or the receiver is
enabled.
Extended baud rate generation
The extended prescaler option gives a very fine tuning on the baud rate, using a 255 value
prescaler, whereas the conventional baud rate generator retains industry standard software
compatibility.
The extended baud rate generator block diagram is described in
The output clock rate sent to the transmitter or to the receiver is the output from the 16
divider divided by a factor ranging from 1 to 255 set in the SCIERPR or the SCIETPR
registers.
Tx =
The stop bit is not recognized on reception at the expected time, following either a
desynchronization or excessive noise.
A break is received.
the FE bit is set by hardware
Data is transferred from the shift register to the SCIDR register.
No interrupt is generated. However this bit rises at the same time as the RDRF bit
which itself generates an interrupt.
(16
f
CPU
*
PR)
*
TR
CPU
is 8 MHz (normal mode) and if PR = 13 and TR = RR = 1, the transmit and
Rx =
SCI baud rate register (SCIBRR) on page
(16
f
CPU
*
PR)
*
RR
SCI baud rate register (SCIBRR) on page 156,
SCI baud rate register (SCIBRR) on page
Figure
156, SCP[1:0] bits)
On-chip peripherals
63.
156,
SCT[2:0]
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