st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 340

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
Electrical characteristics
12.12.2
Table 217. Input stage (comparator + sampling)
1. The comparator accuracy is dependent of the environment. The offset value is given for a comparison done with all digital
340/371
Symbol
t
sampling
t
t
V
I
propag
startup
offset
V
offset
I/Os stable. Negative injection current on the I/Os close to the inputs may reduce the accuracy. In particular care must be
taken to avoid switching on I/Os close to the inputs when the comparator is in use. This phenomenon is even more critical
when a big external serial resistor is added on the inputs.
IN
Comparator input
voltage range
Comparator offset error
Input offset current
Comparator
propagation delay
Start-up filter duration
Digital sampling delay
Input stage (comparator + sampling)
Parameter
(2)
(3)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Time waited before sampling when
comparator is turned ON, that is,
CKE = 1 or DAC = 1
(with f
Time needed to generate a capture in
tachogenerator mode as soon as the
MCI input toggles
Time needed to capture MTIM in
MZREG (BEMF) when sampling
during PWM signal OFF time as soon
as MCO becomes ON
Time needed to set/reset the HST bit
when sampling during PWM signal
OFF time as soon as MCO becomes
ON (BEMF)
Time needed to generate Z event
(MTIM captured in MZREG) as soon
as the comparator toggles (when
sampling at f
Time needed to generate D event
(MTIM captured in MDREG) as soon
as the comparator toggles
Time needed to set/reset the HST bit
when sampling during PWM signal
ON time after a delay (DS > 0) as
soon as MCO becomes ON
Time needed to generate Z event
(MTIM in MZREG) when sampling
during PWM signal ON time after a
delay (DS > 0) as soon as MCO
becomes ON
Time needed to generate Z event
(MTIM captured in MZREG) when
sampling during PWM signal ON time
at f
SCF
PERIPH
after a delay (DS > 0)
SCF
Conditions
= 4 MHz)
)
V
SSA
Min
1/f
1/f
Delay programmed in DS bits
Delay programmed in DS bits
Delay programmed in DS bits
- 0.1
SCF
SCF
MCONF) + 1/f
3 /f
1/f
+ 3/f
+ 3/f
(MCONF) + 1/f
(MCONF) + 3/f
mtc
mtc
(see
(see
(see
(see
(see
Typ
mtc
mtc
35
5
3
Figure
Figure
Figure
4/f
(see
(see
Figure
mtc
Figure
SCF
V
153)
153)
153)
Figure
Figure
DD
+ 3/f
mtc
mtc
40
Max
151)
100
151)
1
+ 0.1
(1)
mtc
152)
152)
Unit
mV
µA
ns
µs
V

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