tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 114

• Manufacturer Part Number: tmp1941af
• Description: 32-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

8.3.3
Internal clock
Internal address
External address
BUSRQ
BUSAK
Internal clock
Internal address
External address
BUSRQ
BUSAK
1. BUSRQ is sampled high.
2. The TMP1941AF recognizes the assertion of BUSRQ .
3. The TMP1941AF asserts BUSAK at the completion of the current bus cycle. The external bus
1. The external bus master has control of the bus.
2. When the external bus master no longer needs the bus, it deasserts BUSRQ .
3. In response to the deassertion of BUSRQ , the TMP1941AF deasserts BUSAK .
Relinquishing the bus
the bus to the TMP1941AF. Figure 8.12 shows the timing for an external bus master to relinquish the
bus.
master recognizes BUSAK and assumes bus mastership to start a bus transfer.
When the external bus master has completed its bus transactions, it deasserts BUSRQ to relinquish
Figure 8.12 External Bus Master Relinquishing the Bus
TMP1941AF external access
TMP1941AF external access
Figure 8.11 Bus Arbitration Timing Diagram
1
TMP1941AF
TMP1941AF
2
TMP1941AF-74
3
External bus master
External bus masters
TMP1941AF external access
TMP1941AF
external access
1
‡ @‡ A ‡ B
2 3
TMP1941AF
TMP1941AF
TMP1941AF
2003-03-27