tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 212

• Manufacturer Part Number: tmp1941af
• Description: 32-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13.3 Register Description
SC0MOD0
(0xFFFF_F202)
Name
Read/Write
Reset Value
Function
Note:
In I/O Interface mode, a serial clock is selected by the SIO0 Control Register (SC0CR).
Bit 8 of a
transmitted
character
Figure 13.9 SIO0 Mode Register 0 (SC0MOD0)
TB8
7
0
Handshake
control
0: Disables
1: Enables
CTS
operation
CTS
operation
CTSE
6
0
TMP1941AF-172
Receive
control
0: Disables
1: Enables
receiver
receiver
RXE
5
0
Wake-up
function
0: Disabled
1: Enabled
WU
4
0
Wake-up function
Handshake ( CTS ) control
R/W
0
1
0
1
Serial transfer mode
00: I/O Interface mode
01: 7-bit UART mode
10: 8-bit UART mode
11: 9-bit UART mode
SM1
Interrupt on every received
character
Interrupt only when RB8 = 1
Disable (Accepts data streams at all times)
Enable
3
0
9-Bit UART Mode
SM0
2
0
TMP1941AF
Serial clock (for UART)
00: TA0TRG (timer)
01: Baud rate generator
10: Internal fsys/2 clock
11: External clock
SC1
(SCLK0 input)
1
0
2003-03-27
Don’t care
Other Modes
SC0
0
0