tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 314

• Manufacturer Part Number: tmp1941af
• Description: 32-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Chip Select/Wait Controller (1 of 4)
Mnemonic Name Address
19.3 Chip Select/Wait Controller
BMA0
BMA1
Address
Register
Address
Register
Base/
Base/
Mask
Mask
E400H
E404H
FFFF
FFFF
Bits 9–0 specify the address bits (A23–A14) to be masked.
0: The corresponding address bit is not masked.
1: The corresponding address bit is masked.
Must be
written as
0.
Bits 9–0 specify the address bits (A23–A14) to be masked.
0: The corresponding address bit is not masked.
1: The corresponding address bit is masked.
Must be
written as
0.
15
23
31
15
23
31
7
7
1
0
0
0
1
0
0
0
Must be
written as
0.
Must be
written as
0.
14
22
30
14
22
30
6
6
TMP1941AF-274
1
0
0
0
1
0
0
0
Must be
written as
0.
Must be
written as
0.
13
21
29
13
21
29
5
5
1
0
0
0
1
0
0
0
A23–A16 of the starting address for CS0
A31–A24 of the starting address for CS0
A23–A16 of the starting address for CS1
A31–A24 of the starting address for CS1
Must be
written as
0.
Must be
written as
0.
12
20
28
12
20
28
4
4
1
0
0
0
1
0
0
0
MA0
R/W
MA0
R/W
R/W
R/W
MA1
R/W
MA1
R/W
R/W
R/W
BA0
BA0
BA1
BA1
Must be
written as
0.
Must be
written as
0.
19
27
19
27
11
11
3
3
1
0
0
0
1
0
0
0
Must be
written as
0.
Must be
written as
0.
10
18
26
10
18
26
2
2
TMP1941AF
1
0
0
0
1
0
0
0
Address mask
0: Not masked
1: Masked
Address mask
0: Not masked
1: Masked
17
25
17
25
1
9
1
9
1
0
0
0
1
0
0
0
2003-03-27
16
24
16
24
0
8
0
8
1
0
0
0
1
0
0
0