tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 57
tmp1941af
Manufacturer Part Number
tmp1941af
Description
32-bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1941AF.pdf
(354 pages)
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Part Number:
TMP1941AF
Manufacturer:
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tmp1941af(Z)
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IMCGA3
(0xFFFF_EE13)
IMCGB0
(0xFFFF_EE14)
IMCGB1
(0xFFFF_EE15)
IMCGB2
(0xFFFF_EE16)
IMCGB3
(0xFFFF_EE17)
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
The edge/level sensitivity must be defined for an interrupt pin which is enabled as wake-up
signaling to exit STOP/SLEEP mode.
Interrupt programming must follow these steps:
1. Configure the pin as an interrupt input, if the pin is multiplexed with a general-purpose port.
2. Set the active state for the interrupt during initialization.
3. Clear any interrupt request.
4. Enable the interrupt.
The above steps must be performed with the relevant interrupt pin disabled.
The TMP1941AF has six interrupt sources which can be used for wake-up signaling to exit
STOP/SLEEP mode: INT0 to INT4 (external interrupts) and INTRTC (internal RTC interrupt).
When one of these interrupt sources is used for STOP/SLEEP wake-up signaling, its interrupt
sensitivity defined in the CG block overrides the setting in the INTC block. In the INTC block,
its senstivity must be set to the high level (which has no effect).
31
15
23
31
7
30
14
22
30
6
TMP1941AF-17
Wake-up INT3 sensitivity
00: Low level
01: High level
10: Falling edge
11: Rising edge
Wake-up INT4 sensitivity
00: Low level
01: High level
10: Falling edge
11: Rising edge
Must be set to 10.
Must be set to 10.
Wake-up INTRTC
sensitivity
00: Don’t use.
01: Don’t use.
10: Don’t use.
11: Rising edge
These bits must be set
to 11.
EMCG31
EMCG41
EMCG71
29
13
21
29
5
1
1
1
1
1
R/W
R/W
R/W
EMCG30
EMCG40
EMCG70
28
12
20
28
4
0
0
0
0
0
27
11
19
27
3
26
10
18
26
2
TMP1941AF
25
17
25
1
9
2003-03-27
INT3
enable
0: Disable
1: Enable
INT4
enable
0: Disable
1: Enable
Must be set
to 0.
Must be set
to 0.
INTRTC
enable
0:Disable
1: Enable
INTRTCEN
INT3EN
INT4EN
R/W
R/W
R/W
24
16
24
0
8
0
0
0
0
0
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