tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 275

• Manufacturer Part Number: tmp1941af
• Description: 32-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

WDMOD
(0xFFFF_F090)
WDCR
(0xFFFF_F091)
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Time-out peiord (@ fc = 40 MHz, fs = 32.768 kHz)
SYSCR1.SYSCK
System Clock
0 (fgear)
Select
1 (fs)
Figure 16.4 Watchdog Timer Mode Register (WDMOD)
Figure 16.5 Watchdog Timer Control Register (WDCR)
WDT
enable
1: Enable
B1H: WDT disable code
4EH : WDT clear-count code
WDTE
R/W
7
7
1
SYSCR1.GEAR[1:0]
Clock Gear Value
Time-out period
00: 2
01: 2
10: 2
11: 2
WDTP1
xxx
00 (fc)
01 (fc/
10 (fc/
11 (fc/
6
6
0
16
18
20
22
/fsys
/ fsys
/ fsys
/ fsys
TMP1941AF-235
2
4
8
R/W
)
)
)
WDTP0
5
5
0
13.107 ms
2.0 s
1.638 ms
3.277 ms
6.554 ms
00



4
4
Special code

W

System reset
WDT enable
Other values
Watchdog Timer Time-out Period
0
1
0
1
B1H
4EH
13.107 ms
26.214 ms
52.429 ms



3
3
6.554 ms
8.0 s
Disable
Enable

Internally routes the WDT time-out signal
to the system reset
WDMOD.WDTP[1:0]
01
IDLE
0: Off
1: On
I2WDT
WDT disable code
WDT clear-count code
Don’t care
2
2
0
TMP1941AF
104.858 ms
209.715 ms
32.0 s
26.214 ms
52.429 ms
R/W
10
1: System
RESCR
reset
1
1
0
2003-03-27
Must be
written as
0.
128.0 s
104.858 ms
209.715 ms
419.430 ms
838.861 ms
R/W

11
0
0
0