tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 123
tmp1941af
Manufacturer Part Number
tmp1941af
Description
32-bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1941AF.pdf
(354 pages)
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BEXCS
(0xFFFF_E488)
9.3
Application Example
Kbytes of ROM and 256 Kbytes of RAM are connected off-chip through a 16-bit data bus.
Figure 9.7 External Memory Connections (ROM Width = 16 bits, RAM Width = 16 bits)
TMP1941AF
Figure 9.7 shows an example usage of the TMP1941AF programmable chip selects. In this example, 128
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
AD8–15
A16–17
AD0–7
HWR
AM1
AM0
ALE
CS2
CS1
WR
RD
Chip select output
waveform
00: ROM/RAM
Don’t use any other
value.
BEXOM
W
0
Figure 9.6 Chip Select/Wait Control Registers
15
7
Latch × 16
D Q
LE
0
14
6
TMP1941AF-83
A1–15
A1–15
13
5
A16
A1–15
A16–17
A16–17
Data bus
width
0: 16-bit
1: 8-bit
BEXBUS
W
0
12
4
ROM (128 Kbits × 16)
RAM (128 Kbits × 8)
RAM (128 Kbits × 8)
OE
CE
OE
R/
CE1
OE
R/
CE1
A15
A0–14
A15–16
A0–14
A15–16
A0–14
W
W
Sets the number of Wait cycles
0000–0111: 0–7 wait states
1111: (1 + N) wait states, as determined by the
Don’t use any other value.
BEXW
0
Upper Byte
Lower Byte
11
3
WAIT pin
1
10
I/O1–8
I/O1–8
2
D8–15
D0–7
TMP1941AF
Number of dummy
cycles (Read recovery
time)
00: 2 dummy cycles
01: 1 dummy cycle
10: No dummy cycle
11: Don’t use.
0
BEXRCV
W
0
1
9
2003-03-27
1
0
0
8
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