tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 116

• Manufacturer Part Number: tmp1941af
• Description: 32-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

BMA0
(0xFFFF_E400)
BMA1
(0xFFFF_E404)
Note: Bits 10–15 in the BMA0 and BMA1 must be written as zeros. The CS0 and CS1 block sizes can
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
vary from 16 Kbytes to 1 Gbytes. However, the TMP1941AF supports only 16 Mbytes of external
address space. Therefore, bits 10–15 in the BMA0 and BMA1 must be cleared so that A24–A29 of
an address will not be masked.
Figure 9.1 Base/Mask Address Registers (BMA0 and BMA1)
15
23
31
15
23
31
7
7
1
0
0
0
1
0
0
0
CS0 block size
CS1 block size
Base/Mask Address Registers
14
22
30
14
22
30
6
1
0
0
0
6
1
0
0
0
TMP1941AF-76
Must be written as 0.
Must be written as 0.
A23–A16 of the starting address for CS0
A31–A24 of the starting address for CS0
A23–A16 of the starting address for CS1
A31–A24 of the starting address for CS1
13
21
29
13
21
29
5
5
1
0
0
0
1
0
0
0
0: The address compare logic uses this address bit.
0: The address compare logic uses this address bit.
MA0 (A29 – A14)
MA0 (A29 – A14)
MA1 (A29 – A14)
MA1 (A29 – A14)
12
20
28
12
20
28
4
4
1
0
0
0
1
0
0
0
R/W
R/W
BA0
R/W
BA0
R/W
R/W
R/W
BA1
R/W
BA1
R/W
19
27
19
27
11
11
3
3
1
0
0
0
1
0
0
0
10
18
26
10
18
26
2
1
0
0
0
2
1
0
0
0
TMP1941AF
17
25
17
25
1
9
1
9
1
1
0
0
1
1
0
0
2003-03-27
16
24
16
24
0
8
0
8
1
1
0
0
1
1
0
0