tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 88

• Manufacturer Part Number: tmp1941af
• Description: 32-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

7.8
TXD3, TXD4
Port 7 (P70–P77)
pins. Upon reset, all Port 7 pins are configured as input port pins. Alternatively, P70 and P72 can each be
programmed as either the TXD output from an SIO channel or the clock input (TA0IN or TA2IN) to an 8-bit
timer. P71 and P73 can each be programmed as either the RXD input to an SIO channel or the timer output
(TA1OUT or TA3OUT) from an 8-bit timer. P74 and P75 can each be programmed as either the clock input
(TB0IN0 or TB0IN1) to a 16-bit timer or an external interrupt request pin (INT5 or INT6). P76 can be
programmed as the timer flip-flop output (TB0OUT) from a 16-bit timer. P77 can be programmed as an
external interrupt request pin (INT0).
Latch (P7) to all 1s, and clears the P7CR and P7FC register bits, configuring all Port 7 pins as input port
pins. When INT0 is used as a wake-up from STOP mode with the SYSCR2.DRVE bit cleared, the
P7FC.P77F bit must be set to 1.
Eight Port 7 pins can be individually programmed to function as discrete general-purpose or dedicated I/O
The P7CR and P7FC registers select the direction and function of the Port 7 pins. A reset sets the Output
Direction Control
Function Control
P7CR Write
P7FC Write
Output Latch
P7 Write
TA0IN
TA2IN
(bitwise)
Reset
(bitwise)
P7 Read
S
Figure 7.14 Port 7 (P70, P72)
A
B
Selector
Selector
TMP1941AF-48
S
S
B
A
Configurable as an
open-drain output
ODE.ODE70
ODE.ODE72
TMP1941AF
P70 (TA0IN/TXD3)
P72 (TA2IN/TXD4)
2003-03-27