r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1010
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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20. Graphics Data Translation Accelerator (GDTA)
20.3.2
GACER is in the GDTA common register block and controls the block operation.
Rev.1.00 Jan. 10, 2008 Page 980 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to 2
1
0
R/W:
R/W:
BIt:
BIt:
GA Enable Register (GACER)
Bit Name
⎯
MC_EN
CL_EN
31
15
⎯
⎯
⎯
⎯
0
0
30
⎯
⎯
14
⎯
⎯
0
0
29
⎯
⎯
13
⎯
⎯
0
0
Initial
Value
All 0
0
0
28
12
⎯
⎯
⎯
⎯
0
0
R/W
⎯
R/W
R/W
27
11
⎯
⎯
⎯
⎯
0
0
26
10
⎯
⎯
⎯
⎯
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Enables access to the MC registers.
0: Writing to the MC registers is invalid. The value read
1: Reading and writing are enabled.
Enables access to the CL registers.
0: Writing to the CL registers is invalid. The value read
1: Reading and writing are enabled.
from the MC register is undefined.
from the CL register is undefined.
25
⎯
⎯
⎯
⎯
0
9
0
24
⎯
⎯
⎯
⎯
0
8
0
23
⎯
⎯
⎯
⎯
0
7
0
22
⎯
⎯
⎯
⎯
0
6
0
21
⎯
⎯
⎯
⎯
0
5
0
20
⎯
⎯
⎯
⎯
0
4
0
19
⎯
⎯
⎯
⎯
0
3
0
18
⎯
⎯
⎯
⎯
0
2
0
MC_EN
R/W
17
⎯
⎯
0
1
0
CL_EN
R/W
16
⎯
⎯
0
0
0
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