r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1243
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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• The command response is received from the card.
• The end of the command sequence is detected by poling the BUSY flag in CSTR or by the
• Check whether the state is data busy through the DTBUSY bit in CSTR. If data busy is
• Write the CMDOFF bit to 1, if a CRC error (CRCERI) or a command timeout error (CTERI)
• The MMCCMD and MMCDAT pins go to the high impedance state when the MMCIF and the
(DTBUSY_TU)
Input/output pins
(CMDSTART)
CMDSTRT
(DTBUSY)
MMCCMD
If the card returns no command response, the command response is detected by the command
timeout error (CTERI).
command response receive end interrupt (CRPI).
detected, the end of the data busy state is then detected through the data busy end interrupt
(DBSYI).
occurs.
MMC card do not drive the bus and the input level of these pins is high because they are
pulled-up internally.
MMCCLK
(DBSYI)
MMCDAT
INTSTR0
(CWRE)
(BUSY)
(CMDI)
Figure 24.5 Example of Command Sequence for Commands without Data Transfer
(CRPI)
CSTR
(REQ)
Command transmission period
Command transmission
Command output (48 bits)
started
(No Data Busy State)
Command sequence execution period
Rev.1.00 Jan. 10, 2008 Page 1213 of 1658
Command response
24. Multimedia Card Interface (MMCIF)
reception
Response reception
REJ09B0261-0100
(No busy state)
completed
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