r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 883
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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Part Number:
r8a77850anbgV
Manufacturer:
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19.3.4
The display unit status register clear register (DSRCR) is a register which clears the various flags
in DSSR.
Internal update:
Internal update:
Bit
31 to 16 ⎯
15
14
13, 12
11
10
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Display Unit Status Register Clear Register (DSRCR)
Bit Name
TVCL
FRCL
⎯
VBCL
⎯
TVCL
31
15
—
—
W
R
0
FRCL
30
14
—
—
W
R
0
Initial
Value
All 0
Undefined W
Undefined W
All 0
Undefined W
0
29
—
13
—
R
R
0
0
28
12
—
—
R
R
0
0
R/W
R
R
R
VBCL
27
11
—
—
W
R
0
Internal
Update
⎯
None
None
⎯
None
⎯
26
10
—
—
R
R
0
0
RICL
25
—
—
W
R
0
9
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
TV Synchronous Signal Error Flag Clear
0: The TVR flag in DSSR is not changed.
1: The TVR flag in DSSR is cleared to 0.
Flame Flag Clear
0: The FRM flag in DSSR is not changed.
1: The FRM flag in DSSR is cleared to 0.
Reserved
These bits are always read as 0. The write value
should always be 0.
Vertical Blanking Flag Clear
0: The VBK flag in DSSR is not changed.
1: The VBK flag in DSSR is cleared to 0.
Reserved
This bit is always read as 0. The write value
should always be 0.
HBCL
24
—
—
W
R
0
8
23
—
—
R
R
0
7
0
Rev.1.00 Jan. 10, 2008 Page 853 of 1658
22
—
—
R
R
0
6
0
21
—
—
R
R
0
5
0
20
—
—
R
R
0
4
0
19. Display Unit (DU)
19
—
—
R
R
0
3
0
REJ09B0261-0100
18
—
—
R
R
0
2
0
17
—
—
R
R
0
1
0
16
—
—
R
R
0
0
0
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