r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1011

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

20.3.3
GACISR is in the GDTA common register block and indicates the states of interrupt sources for
each module.
Note: MC processing completion is indicated when the command processing is complete and the
Initial value:
Initial value:
Bit
31 to 4
3
2
1
0
R/W:
R/W:
BIt:
BIt:
end command is written to the MC command FIFO (see section 20.3.17, CL Input Y
Padding Size Setting Register (CLIYPR)).
GA Interrupt Source Indicating Register (GACISR)
Bit Name
⎯
MC_EER
CL_EER
MC_END
CL_END
31
15
⎯
⎯
⎯
⎯
0
0
30
14
⎯
⎯
⎯
⎯
0
0
29
13
⎯
⎯
⎯
⎯
0
0
Initial
Value
All 0
0
0
0
0
28
⎯
⎯
12
⎯
⎯
0
0
R/W
⎯
R
R
R
R
27
⎯
⎯
11
⎯
⎯
0
0
26
10
⎯
⎯
⎯
⎯
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Indicates whether an MC module error interrupt has
occurred.
0: No error
1: Error occurred
Indicates whether a CL module error interrupt has
occurred.
0: No error
1: Error occurred
Indicates whether an MC module processing end
interrupt has occurred.
0: '1' has been written to the MC_ENCR bit in GACICR.
1: Processing completed
Indicates whether a CL module processing end interrupt
has occurred.
0: '1' has been written to the CL_ENCR bit in GACICR.
1: Processing completed
25
⎯
⎯
⎯
⎯
0
9
0
24
⎯
⎯
⎯
⎯
0
8
0
20. Graphics Data Translation Accelerator (GDTA)
23
⎯
⎯
⎯
⎯
0
7
0
Rev.1.00 Jan. 10, 2008 Page 981 of 1658
22
⎯
⎯
⎯
⎯
0
6
0
21
⎯
⎯
⎯
⎯
0
5
0
20
⎯
⎯
⎯
⎯
0
4
0
MC_ERR
19
⎯
⎯
R
0
3
0
REJ09B0261-0100
CL_ERR
18
⎯
⎯
R
0
2
0
MC_END
17
⎯
⎯
R
0
1
0
CL_END
16
⎯
⎯
R
0
0
0