r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1065

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Figure 21.1 shows a block diagram of the SCIF. Figures 21.2 to 21.6 show block diagrams of the
I/O ports in the SCIF. There are six channels in this LSI. In figures 21.2 to 21.6, the channel
number is omitted.
Figures 21.2 to 21.6 show block diagrams of the I/O ports in SCIF.
SCIFn_RXD
SCIFn_TXD
SCIFn_SCK
SCIF0_CTS
SCIF0_RTS
Legend:
SCRSRn:
SCFRDRn:
SCTSRn:
SCFTDRn:
SCSMRn:
SCSCRn:
SCFSRn:
SCBRRn:
SCSPTRn:
SCFCRn:
SCTFDRn:
SCRFDRn:
SCLSRn:
SCRERn:
Note: n = 0 to 5
(64 stages)
Channels 1 to 5 do not have SCIF1_CTS to SCIF5_CTS and SCIF1_RTS to SCIF5_RTS.
SCFRDRn (128 stages)
Receive shift register
Receive FIFO data register
Transmit shift register
Transmit FIFO data register
Serial mode register
Serial control register
Serial status register
Bit rate register
Serial port register
FIFO control register
Transmit FIFO data count register
Receive FIFO data count register
Line status register
Serial error register
SCRSRn
Figure 21.1 Block Diagram of SCIF
(64 stages)
SCFTDRn (128 stages)
Parity check
Parity generation
SCTSRn
Module data bus
Transmission/
reception control
21. Serial Communication Interface with FIFO (SCIF)
SCTFDRn
SCRFDRn
SCFCRn
SCFSRn
SCSCRn
SCSPTRn
SCRERn
SCSMRn
SCLSRn
Rev.1.00 Jan. 10, 2008 Page 1035 of 1658
Clock
External clock
Baud rate generator
SCIF
SCBRRn
REJ09B0261-0100
Pck
Pck/4
Pck/64
Pck/16
TXIn
RXIn
ERIn
BRIn