r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1146
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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22. Serial I/O with FIFO (SIOF)
Rev.1.00 Jan. 10, 2008 Page 1116 of 1658
REJ09B0261-0100
Bit
3
2
Bit Name
TFOVF
TFUDF
Initial
Value
0
0
R/W
R/W
R/W
Transmit FIFO Overflow
Description
0: Indicates that no transmit FIFO overflow occurs
1: Indicates that a transmit FIFO overflow occurs
A transmit FIFO overflow means that there has been an
attempt to write to SITDR when the transmit FIFO is full.
When a transmit FIFO overflow occurs, the SIOF
indicates overflow, and writing is invalid.
•
•
•
Transmit FIFO Underflow
0: Indicates that no transmit FIFO underflow occurs
1: Indicates that a transmit FIFO underflow occurs
A transmit FIFO underflow means that loading for
transmission has occurred when the transmit FIFO is
empty.
When a transmit FIFO underflow occurs, the SIOF
repeatedly sends the previous transmit data.
•
•
•
This bit is valid when the TXE bit in SICTR is 1.
When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
To enable the issuance of this interrupt source, set
the TFOVFE bit in SIIER to 1.
This bit is valid when the TXE bit in SICTR is 1.
When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
To enable the issuance of this interrupt source, set
the TFUDFE bit to 1.
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