r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 595

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Bit
6
5
4
3
2
1
0
Bit Name
PER
VGAPS
MWIE
SC
BM
MS
IOS
Initial
Value
0
0
0
0
0
0
0
R/W
PCI: R/W
SH: R
PCI: R
SH: R
PCI: R
SH: R
PCI: R
SH: R/W
PCI: R/W
SH: R/W
PCI: R/W
SH: R/W
PCI: R/W
SH: R/W
Description
Parity Error Response
Controls the response of the device when the PCIC
detects a parity error or receives a parity error. When
this bit is set to 1, the PERR signal is asserted.
0: Ignores parity error
1: Responds to parity error
VGA Palette Snoop Control
0: VGA compatible device
1: Incompatible with palette register write (not
Memory Write and Invalidate Control
This bit controls issue of a memory and invalidate
command when the PCIC is a master.
0: Memory write is used
1: Memory write and invalidate command can be
Special Cycle Control
This bit indicates whether special cycles are supported
when the PCIC is a target.
0: Special cycles ignored
1: Special cycles monitored (not supported)
PCI Bus Master Control
Controls a bus master.
0: Bus master disabled
1: Bus master enabled
PCI Memory Space Control
This bit controls accesses to memory spaces when the
PCIC is a target. When this bit is cleared to 0, a
memory transfer to the PCIC is completed by master
abort.
0: Accesses to memory spaces disabled
1: Accesses to memory spaces enabled
PCI I/O Space Control
This bit controls accesses to memory spaces when the
PCIC is a target. When this bit is cleared to 0, an I/O
transfer to the PCIC is completed by master abort.
0: Accesses to I/O spaces disabled
1: Accesses to I/O spaces enabled
executed (not supported)
supported)
Rev.1.00 Jan. 10, 2008 Page 565 of 1658
13. PCI Controller (PCIC)
REJ09B0261-0100