r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 519

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Bit
23 to 20 ⎯
19 to 16 TRAS3 to
15
Bit Name
TRAS0
⎯
Initial
Value
All 0
0011
0
R/W
R
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
These bits set the ACT-PRE minimum period constraint
for the same bank. These bits should be set according
to the DDR2-SDRAM specifications. The number of
cycles is the number of DDR clock cycles.
0000: Setting prohibit (If specified, correct operation
0010: Setting prohibit (If specified, correct operation
0011: 4 cycles
0100: 5 cycles
1110: 15 cycles
1111: Setting prohibit (If specified, correct operation
This bit is always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
tRAS (ACT-PRE period) Setting Bits
Reserved
:
:
cannot be guaranteed.)
cannot be guaranteed.)
cannot be guaranteed.)
Rev.1.00 Jan. 10, 2008 Page 489 of 1658
12. DDR2-SDRAM Interface (DBSC2)
REJ09B0261-0100