r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 708
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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14. Direct Memory Access Controller (DMAC)
14.3.4
DARB are 32-bit readable/writable registers that specify the destination address of a DMA
transfer that is set in DAR again in repeat/reload mode. The data written to DAR by the CPU is
also written to DARB. To set the address that is different from DAR address, write data to DAR,
then, to DARB.
A word or longword boundary address should be specified when a word or longword transfer is
performed respectively. A 16-byte or 32-byte boundary value should be specified when a 16-byte
or 32-byte transfer is performed respectively.
The initial value of DARB is undefined.
Rev.1.00 Jan. 10, 2008 Page 678 of 1658
REJ09B0261-0100
Initial value:
Initial value:
R/W:
R/W:
BIt:
BIt:
DMA Destination Address Registers B0 to B3, B6 to B9 (DARB0 to DARB3,
DARB6 to DARB9)
R/W
R/W
31
15
⎯
⎯
R/W
R/W
30
⎯
14
⎯
R/W
R/W
29
⎯
13
⎯
R/W
R/W
28
12
⎯
⎯
R/W
R/W
27
11
⎯
⎯
R/W
R/W
26
10
⎯
⎯
R/W
R/W
25
⎯
⎯
9
R/W
R/W
24
⎯
⎯
8
R/W
R/W
23
⎯
⎯
7
R/W
R/W
22
⎯
⎯
6
R/W
R/W
21
⎯
⎯
5
R/W
R/W
20
⎯
⎯
4
R/W
R/W
19
⎯
⎯
3
R/W
R/W
18
⎯
⎯
2
R/W
R/W
17
⎯
⎯
1
R/W
R/W
16
⎯
⎯
0
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