r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 523
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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Part Number:
r8a77850anbgV
Manufacturer:
Renesas Electronics America
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Bit
15 to 11 ⎯
10 to 8
7 to 3
Bit Name
TRRD2 to
TRRD0
⎯
Initial
Value
All 0
000
All 0
R/W
R
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
These bits set the ACT-ACT minimum period constraint
for the different banks. These bits should be set
according to the DDR2-SDRAM specifications. The
number of cycles is the number of DDR clock cycles.
000: 1 cycle
001: 2 cycles
010: 3 cycles
011: 4 cycles
100: Setting prohibit (If specified, correct operation
111: Setting prohibit (If specified, correct operation
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
tRRD (ACT(A)-ACT(B) period) Setting Bits
:
cannot be guaranteed.)
cannot be guaranteed.)
Rev.1.00 Jan. 10, 2008 Page 493 of 1658
12. DDR2-SDRAM Interface (DBSC2)
REJ09B0261-0100
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