r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 128
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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5. Exception Handling
5.5
5.5.1
Figure 5.1 shows an outline flowchart of the basic operations in instruction execution and
exception handling. For the sake of clarity, the following description assumes that instructions are
executed sequentially, one by one. Figure 5.1 shows the relative priority order of the different
kinds of exceptions (reset, general exception, and interrupt). Register settings in the event of an
exception are shown only for SSR, SPC, SGR, EXPEVT/INTEVT, SR, and PC. However, other
registers may be set automatically by hardware, depending on the exception. For details, see
section 5.6, Description of Exceptions. Also, see section 5.6.4, Priority Order with Multiple
Exceptions, for exception handling during execution of a delayed branch instruction and a delay
slot instruction, or in the case of instructions in which two data accesses are performed.
Rev.1.00 Jan. 10, 2008 Page 98 of 1658
REJ09B0261-0100
Exception Flow
Exception Flow
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