r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 796

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

16. Watchdog Timer and Reset (WDT)
16.3.3
WDTBST is a 32-bit readable/writable register that specifies the time until counter WDTBCNT
overflows when the bus clock frequency has been changed. The time until WDTBCNT overflows
becomes minimum when H'5500 0001 is set, and maximum when H'5500 0000 is set.
WDTBST should be written to as a longword unit, with H'55 in the most significant byte. The
value read from this byte is always H'00. WDTBST is only rest by a power-on reset caused by the
PRESET pin.
Rev.1.00 Jan. 10, 2008 Page 766 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to 24
23 to 18
17 to 0
R/W:
R/W:
Bit:
Bit:
Watchdog Timer Base Stop Time Register (WDTBST)
Bit Name
(Code for
writing)
⎯
WDTBST
R/W
R/W
31
15
0
0
R/W
R/W
30
14
0
0
R/W
R/W
29
13
Code for writing (H'55)
0
0
Initial
Value
All 0
All 0
All 0
R/W
R/W
28
12
0
0
R/W
R/W
R/W
R/W
R
R/W
27
11
0
0
R/W
R/W
26
10
0
0
Description
Code for writing (H'55)
These bits are always read as H'00. When writing to
this register, the value written to these bits must be
H'55.
Reserved
These bits are always read as 0. The write value
should always be 0.
Base Timer Stop
These bits set the counter value at which WDTBCNT
overflows.
H'00001: Minimum overflow value
H'00000: Maximum overflow value
R/W
R/W
25
0
9
0
R/W
R/W
24
WDTBST
0
8
0
R/W
23
⎯
R
0
7
0
R/W
22
⎯
R
0
6
0
R/W
21
⎯
R
0
5
0
R/W
20
⎯
R
0
4
0
R/W
19
⎯
R
0
3
0
R/W
18
⎯
R
0
2
0
R/W
R/W
17
WDTBST
0
1
0
R/W
R/W
16
0
0
0