r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 538

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

12. DDR2-SDRAM Interface (DBSC2)
Rev.1.00 Jan. 10, 2008 Page 508 of 1658
REJ09B0261-0100
Bit
18
17
16
15 to 13 ⎯
12, 11
Bit Name
and
ODTEN0
DIC_DQ
DIC_CK
DIC
ODTEN1
Initial
Value
0
0
0
All 0
00
R/W
R/W
R/W
R/W
R
R/W
Description
Data Pin Impedance value
This bit should be set to the same value as the value set
for DIC of EMRS(1) in the DDR2-SDRAM.
0: Normal
1: Weak
Clock Pin Impedance value
This bit should be set to the same value as the value set
for DIC of EMRS(1) in the DDR2-SDRAM.
0: Normal
1: Weak
Impedance Value Set in the DIC of EMRS(1) in the
SDRAM
This bit should be set to the same value as the value set
for DIC of EMRS(1) in the DDR2-SDRAM.
0: Normal
1: Weak
Reserved
These bits are always read as 0. The write value should
always be 0.
If a value other than 0 is written, correct operation
cannot be guaranteed.
ODT Output Mode Switch
These bits switch the ODT output mode.
For details on the note when the ODTEN bits are set to
01, refer to section 12.5.9, Important Information
Regarding ODT Control Signal Output to SDRAM.
00: The ODT pin is fixed low regardless of WRITE
01: The ODT pin is fixed high when the WRITE
10 and 11: The ODT pin is fixed high regardless of
command issue.
command is issued.
WRITE command issue.