r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 988
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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19. Display Unit (DU)
Table 19.14 Correspondence Table of Settings of Display Timing Generation Registers
Notes: The numerical values in the above table are decimal numbers.
Rev.1.00 Jan. 10, 2008 Page 958 of 1658
REJ09B0261-0100
Register Name
Horizontal display start position
register (HDSR)
Horizontal display end position
register (HDER)
Vertical display start position register
(VDSR)
Vertical display end position register
(VDER)
Horizontal synchronous pulse width
register (HSWR)
Horizontal scan period register
(HCR)
Vertical synchronous position
register (VSPR)
Vertical scan period register (VCR)
DCLKIN(input)
HSYNC( input)
DCLKOUT(output)
DR5-DR0(output)
DG5-DG0(output)
DB5-DB0(output)
1. In all scan modes, VDS, VDE, VSP, VC settings are in single-field units.
2. The values of HDS and HDE are from the fourth rising edge of DCLKOUT after
3. VDS should be set to 1 or greater.
4. HC should be set so as to satisfy HC > HDE.
detection of the falling edge of HSYNC through the rising edge of DCLKOUT.
Bit Name
HDS
HDE
VDS
VDE
HSW
HC
VSP
VC
hsw + xs - 19
hsw + xs – 19 + xw
ys – 2 *
hsw - 1
vc – vsw - 1
Master Mode
ys – 2 + yw
hc - 1
vc - 1
hsw + xs
3
Synchronization Method
TV Sync Mode
hsw + xs – 24 *
hsw + xs – 24 + xw *
ys – 2 *
ys – 2 + yw
hsw - 1
hc - 1
vc – vsw - 1
vc - 1
D0
3
D1
2
D2
2
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