MC56F8245VLD Freescale Semiconductor, MC56F8245VLD Datasheet - Page 16

DSC 48K FLASH 60MHZ 44-LQFP

MC56F8245VLD

Manufacturer Part Number
MC56F8245VLD
Description
DSC 48K FLASH 60MHZ 44-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8245VLD

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
3K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
35
Data Ram Size
6 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 4 Channel
Package
44LQFP
Family Name
MC56F82xx
Maximum Speed
60 MHz
Data Bus Width
16 Bit
Interface Type
I2C/SCI/SPI
On-chip Dac
1-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Section Number
10.5 Initialization/Application Information............................................................................................................................346
16
10.4.2
10.4.3
10.4.4
10.4.5
10.4.6
10.4.1.3
10.4.1.4
10.4.1.5
10.4.1.6
10.4.1.7
10.4.1.8
10.4.1.9
10-bit Address..................................................................................................................................................339
10.4.2.1
10.4.2.2
Address Matching............................................................................................................................................340
System Management Bus Specification...........................................................................................................340
10.4.4.1
Resets...............................................................................................................................................................343
Interrupts..........................................................................................................................................................343
10.4.6.1
10.4.6.2
10.4.6.3
10.4.6.4
10.4.6.5
10.4.6.6
10.4.6.7
Data Transfers................................................................................................................................335
STOP Signal...................................................................................................................................336
Repeated START Signal................................................................................................................336
Arbitration Procedure.....................................................................................................................336
Clock Synchronization...................................................................................................................337
Handshaking...................................................................................................................................337
I2C Divider and Hold Values.........................................................................................................338
Master-Transmitter Addresses a Slave-Receiver...........................................................................339
Master-Receiver Addresses a Slave-Transmitter...........................................................................339
Timeouts.........................................................................................................................................341
10.4.4.1.1 SCL Low Timeout......................................................................................................341
10.4.4.1.2 SCL High Timeout......................................................................................................341
10.4.4.1.3 CSMBCLK TIMEOUT MEXT and CSMBCLK TIMEOUT SEXT.........................342
10.4.4.1.4 FAST ACK and NACK..............................................................................................342
Byte Transfer Interrupt...................................................................................................................344
Address Detect Interrupt................................................................................................................344
Exit from Low-Power/Stop Modes................................................................................................344
Arbitration Lost Interrupt...............................................................................................................345
Timeout Interrupt in SMBus..........................................................................................................345
Programmable Input Glitch Filter..................................................................................................345
Address Matching Wakeup............................................................................................................346
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Preliminary
Title
Freescale Semiconductor
Page

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