MC56F8245VLD Freescale Semiconductor, MC56F8245VLD Datasheet - Page 491

• Manufacturer Part Number: MC56F8245VLD
• Description: DSC 48K FLASH 60MHZ 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8245VLD

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 3K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 6 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 4 Channel
• Package: 44LQFP
• Family Name: MC56F82xx
• Maximum Speed: 60 MHz
• Data Bus Width: 16 Bit
• Interface Type: I2C/SCI/SPI
• On-chip Dac: 1-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.2.3 Interrupt Priority Register 2 (INTC_IPR2)
Address: INTC_IPR2 – F0C0h base + 2h offset = F0C2h
Freescale Semiconductor
Reset
Read
Write
QSCI0_RERR
QSCI1_TIDLE
QSCI1_TDRE
QSCI0_RCV
QSCI1_RCV
Bit
15–14
13–12
11–10
Field
9–8
7–6
QSCI0_RCV
15
0
14
0
QSCI 0 Receiver Full Interrupt Priority Level
These fields are used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited
to priorities 0-2 and are disabled by default.
00
01
10
11
QSCI 0 Receiver Error Interrupt Priority Level
These fields are used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited
to priorities 0-2 and are disabled by default.
00
01
10
11
QSCI 1 Transmitter Empty Interrupt Priority Level
These fields are used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited
to priorities 0-2 and are disabled by default.
00
01
10
11
QSCI 1 Transmitter Idle Interrupt Priority Level
These fields are used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited
to priorities 0-2 and are disabled by default.
00
01
10
11
QSCI 1 Receiver Full Interrupt Priority Level
13
IRQ disabled (default)
IRQ Priority Level 0
IRQ Priority Level 1
IRQ Priority Level 2
IRQ disabled (default)
IRQ Priority Level 0
IRQ Priority Level 1
IRQ Priority Level 2
IRQ disabled (default)
IRQ Priority Level 0
IRQ Priority Level 1
IRQ Priority Level 2
IRQ disabled (default)
IRQ Priority Level 0
IRQ Priority Level 1
IRQ Priority Level 2
0
QSCI0_
RERR
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
0
QSCI1_
TDRE
INTC_IPR2 field descriptions
Table continues on the next page...
10
0
0
9
QSCI1_
TIDLE
Preliminary
0
8
Description
QSCI1_RCV
0
7
0
6
0
5
QSCI1_
Chapter 14 Interrupt Controller (INTC)
RERR
0
4
WAKEUP
0
3
CAN_
0
2
CAN_ERR
0
1
0
0
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