MC56F8245VLD Freescale Semiconductor, MC56F8245VLD Datasheet - Page 397

• Manufacturer Part Number: MC56F8245VLD
• Description: DSC 48K FLASH 60MHZ 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8245VLD

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 3K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 6 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 4 Channel
• Package: 44LQFP
• Family Name: MC56F82xx
• Maximum Speed: 60 MHz
• Data Bus Width: 16 Bit
• Interface Type: I2C/SCI/SPI
• On-chip Dac: 1-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.3.5 SPI FIFO Control Register (QSPI0_FIFO)
This register is used for FIFO control and status.
Address: QSPI0_FIFO – F200h base + 4h offset = F204h
Freescale Semiconductor
Reset
Read
Write
Bit
Field
T13
T12
T11
T10
T9
T8
T7
T6
T5
T4
T3
T2
T1
T0
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
0
0
14
0
Transmit Data Bit 13
Transmit Data Bit 12
Transmit Data Bit 11
Transmit Data Bit 10
Transmit Data Bit 9
Transmit Data Bit 8
Transmit Data Bit 7
Transmit Data Bit 6
Transmit Data Bit 5
Transmit Data Bit 4
Transmit Data Bit 3
Transmit Data Bit 2
Transmit Data Bit 1
Transmit Data Bit 0
TFCNT
13
0
QSPI0_DXMIT field descriptions (continued)
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
0
0
10
0
RFCNT
0
9
Preliminary
0
8
Description
Chapter 12 Queued Serial Peripheral Interface (QSPI)
0
0
7
0
6
TFWM
0
5
0
0
4
1
3
RFWM
1
2
0
0
1
0
0
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