DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 107

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DSPIC33FJ16MC101T-I/SS

Manufacturer Part Number
DSPIC33FJ16MC101T-I/SS
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ16MC101T-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8.0
FIGURE 8-1:
© 2011 Microchip Technology Inc.
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
Note 1: This data sheet summarizes the features
SOSCO
R
SOSCI
Note 1:
(1)
2: Some registers and associated bits
OSCILLATOR
CONFIGURATION
OSC1
OSC2
2:
Oscillator
TUN<5:0>
of the dsPIC33FJ16GP101/102 and
dsPIC33FJ16MC101/102
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 52. “Oscillator (Part
VI)”
PIC24H Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
FRC
If the Oscillator is used with MS or HS modes, an extended parallel resistor with the value of 1 MΩ must be connected.
The term F
ment, F
used with a doze ratio of 1:2 or lower.
Primary Oscillator (P
Secondary Oscillator (S
POSCMD<1:0>
(DS70644)
CY
Oscillator
LPRC
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102 OSCILLATOR SYSTEM
DIAGRAM
and F
P
refers to the clock source for all peripherals, while F
P
LPOSCEN
are used interchangeably, except in the case of DOZE mode. F
OSC
in
S1
÷ 16
S3
)
OSC
the
)
FRCDIV<2:0>
family
“dsPIC33F/
4x PLL
Preliminary
of
in
MSPLL, ECPLL,
FRCPLL
Clock Fail
MS, HS, EC
S7
FRCDIV16
The oscillator system for dsPIC33FJ16GP101/102 and
dsPIC33FJ16MC101/102 devices provides:
• External and internal oscillator options as clock
• An on-chip 4x Phase-Locked Loop (PLL) to scale
• An internal FRC oscillator that can also be used
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in
FRCDIVN
CY
sources
the internal operating frequency to the required
system clock frequency
with the PLL, thereby allowing full-speed
operation without any external clock generation
hardware
savings
clock failure and takes fail-safe measures
selection
Figure
SOSC
LPRC
FRC
refers to the clock source for the CPU. Throughout this docu-
Clock Switch
NOSC<2:0> FNOSC<2:0>
8-1.
S1/S3
S7
S0
S5
S4
S2
S6
P
and F
CY
÷ 2
Reset
will be different when DOZE mode is
DOZE<2:0>
WDT, PWRT,
DS70652C-page 107
(To peripherals)
Timer 1
FSCM
F
F
Fosc
CY
P
(2)
(2)

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