DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 65

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.0
The
dsPIC33FJ16MC101/102 devices contain internal
Flash program memory for storing and executing
application code. The memory is readable, writable,
and erasable during normal operation over the entire
V
Flash memory can be programmed in two ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self-Programming (RTSP)
FIGURE 5-1:
© 2011 Microchip Technology Inc.
DD
programming capability
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
Note 1: This data sheet summarizes the features
range.
2: Some registers and associated bits
FLASH PROGRAM MEMORY
of
dsPIC33FJ16MC101/102
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 5. “Flash
Programming”
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip web site (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
dsPIC33FJ16GP101/102
the
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
dsPIC33FJ16GP101/102
ADDRESSING FOR TABLE REGISTERS
(DS70191)
1/0
0
family
TBLPAG Reg
8 bits
in
and
the
and
Preliminary
of
in
Program Counter
24-bit EA
24 bits
ICSP allows a device to be serially programmed while
in the end application circuit. This is done with two lines
for programming clock and programming data (one of
the alternate programming pin pairs: PGECx/PGEDx),
and three other lines for power (V
Master Clear (MCLR). This allows users to manufac-
ture boards with unprogrammed devices, and then pro-
gram the digital signal controller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
application can write program memory data in a single
program memory word, and erase program memory in
blocks or ‘pages’ of 512 instructions (1536 bytes).
5.1
Regardless of the method used, all programming of
Flash memory is done with the table-read and table-
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits <7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in
The TBLRDL and the TBLWTL instructions are used to
read or write to bits <15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits <23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
DD
Byte
Select
Figure
), ground (V
DS70652C-page 65
5-1.
SS
) and