DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 159

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 15-4:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-0
Note 1:
SEVTDIR
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
R/W-0
R/W-0
2:
SEVTDIR is compared with PTDIR (P
PxSECMP<14:0> is compared with P
(1)
SEVTDIR: Special Event Trigger Time Base Direction bit
1 = A Special Event Trigger will occur when the PWM time base is counting down
0 = A Special Event Trigger will occur when the PWM time base is counting up
SEVTCMP<14:0>: Special Event Compare Value bits
R/W-0
R/W-0
PxSECMP: SPECIAL EVENT COMPARE REGISTER
‘1’ = Bit is set
W = Writable bit
R/W-0
R/W-0
R/W-0
R/W-0
X
X
SEVTCMP<7:0>
TMR<14:0> to generate the Special Event Trigger.
TMR<15>) to generate the Special Event Trigger.
Preliminary
SEVTCMP<14:8>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
(2)
(2)
(1)
(2)
R/W-0
R/W-0
x = Bit is unknown
R/W-0
R/W-0
DS70652C-page 159
R/W-0
R/W-0
bit 8
bit 0