DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 124

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DSPIC33FJ16MC101T-I/SS

Manufacturer Part Number
DSPIC33FJ16MC101T-I/SS
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ16MC101T-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
TABLE 10-1:
10.4.2.2
In contrast to inputs, the outputs of the peripheral pin
select options are mapped on the basis of the pin. In
this case, a control register associated with a particular
pin dictates the peripheral output to be mapped. The
RPORx registers are used to control output mapping.
Like the RPINRx registers, each register contains sets
of 5-bit fields, with each set associated with one RPn
pin (see
value of the bit field corresponds to one of the periph-
erals, and that peripheral’s output is mapped to the pin
(see
The list of peripherals for output mapping also includes
a null value of ‘00000’
technique. This permits any given pin to remain
unconnected from the output of any of the pin
selectable peripherals.
DS70652C-page 124
External Interrupt 1
External Interrupt 2
Timer2 External Clock
Timer3 External Clock
Input Capture 1
Input Capture 2
Input Capture 3
Output Compare Fault A
UART1 Receive
UART1 Clear To Send
SPI1 Slave Select Input
Note 1:
Table 10-2
Register 10-9
Unless otherwise noted, all inputs use the Schmitt input buffers.
Output Mapping
Input Name
and
SELECTABLE INPUT SOURCES (MAPS INPUT TO FUNCTION)
Figure
through
10-3).
because of the mapping
Register
10-16). The
Function Name
U1CTS
Preliminary
OCFA
U1RX
T2CK
T3CK
INT1
INT2
SS1
IC1
IC2
IC3
FIGURE 10-3:
U1RTS Output enable 4
UPDN Output enable
U1TX Output enable
OC2 Output enable
U1RTS Output 4
UPDN Output
U1TX Output
RPINR18
RPINR18
RPINR21
RPINR11
Register
OC2 Output
RPINR0
RPINR1
RPINR3
RPINR3
RPINR7
RPINR7
RPINR8
default
default
RPnR<4:0>
MULTIPLEXING OF
REMAPPABLE OUTPUT
FOR RPn
19
19
© 2011 Microchip Technology Inc.
26
26
0
0
3
3
(1)
Output enable
Output Data
Configuration
U1CTSR<4:0>
OCFAR<4:0>
U1RXR<4:0>
T2CKR<4:0>
T3CKR<4:0>
INT1R<4:0>
INT2R<4:0>
SS1R<4:0>
IC1R<4:0>
IC2R<4:0>
IC3R<4:0>
Bits
RPn

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