DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 259

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DSPIC33FJ16MC101T-I/SS

Manufacturer Part Number
DSPIC33FJ16MC101T-I/SS
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ16MC101T-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 26-17: PLL CLOCK TIMING SPECIFICATIONS
TABLE 26-18: AC CHARACTERISTICS: INTERNAL FAST RC (FRC) ACCURACY
TABLE 26-19: INTERNAL LOW-POWER RC (LPRC) ACCURACY
© 2011 Microchip Technology Inc.
AC CHARACTERISTICS
OS50
OS51
OS52
OS53
Note 1:
AC CHARACTERISTICS
F21a
F21b
Note 1:
AC CHARACTERISTICS
F20a
F20b
Note 1:
Param
Param
Param
No.
No.
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
No.
2:
3:
2:
LPRC @ 32.768 kHz
LPRC
LPRC
F
F
T
D
Symbol
PLLI
SYS
LOCK
Internal FRC Accuracy @ 7.3728 MHz
FRC
FRC
CLK
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
These parameters are characterized by similarity, but are tested in manufacturing at 7.7 MHz input only.
These parameters are characterized by similarity, but are not tested in manufacturing. This specification is
based on clock cycle by clock cycle measurements. The effective jitter for individual time bases or commu-
nication clocks used by the user application, are derived from dividing the CLKO stability specification by
the square root of “N” (where “N” is equal to F
if F
Change of LPRC frequency as V
LPRC accuracy impacts the Watchdog Timer Time-out Period (T
Timer (WDT)”
Frequency calibrated at 25°C and 3.3V. TUN bits may be used to compensate for temperature drift.
OSC
Characteristic
Characteristic
PLL Voltage Controlled
Oscillator (VCO) Input
Frequency Range
On-Chip VCO System
Frequency
PLL Start-up Time (Lock Time)
CLKO Stability (Jitter)
= 32 MHz and the SPI bit rate is 5 MHz, the effective jitter of the SPI clock is equal to:
for more information.
Characteristic
(3)
(1,2)
(2)
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
Operating temperature
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
Operating temperature
Min
Min
-20
-30
1.5
(3)
-2
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
Operating temperature
DD
changes.
±0.25
±0.25
Typ
Typ
±10
±10
(3)
(1)
Preliminary
D
------------- -
CLK
32
----- -
5
OSC
Min
3.0
Max
Max
12
+20
+30
-2
1.5
+2
=
divided by the peripheral data rate clock). For example,
--------- -
2.53
2%
-40°C ≤ T
-40°C ≤T
Typ
Units
Units
-40°C ≤ T
-40°C ≤T
=
%
%
1
-40°C ≤ T
-40°C ≤T
%
%
(1)
0.79%
A
A
≤ +85°C for Industrial
≤+125°C for Extended
Max
WDT
A
A
A
A
32
+2
8
2
≤ +85°C for Industrial
≤+125°C for Extended
≤ +85°C for Industrial
≤+125°C for Extended
1). See
Units
MHz ECPLL and MSPLL
MHz
mS
%
-40°C ≤ T
-40°C ≤ T
-40°C ≤ T
-40°C ≤ T
Section 23.4 “Watchdog
Conditions
Conditions
modes
A
A
A
A
≤ +125°C
≤ +125°C
≤ +85°C
≤ +85°C
Conditions
DS70652C-page 259

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