DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 26

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
3.3
The
dsPIC33FJ16MC101/102 features a 17-bit by 17-bit
single-cycle multiplier that is shared by both the MCU
ALU and DSP engine. The multiplier can perform
signed, unsigned and mixed-sign multiplication. Using
a 17-bit by 17-bit multiplier for 16-bit by 16-bit
multiplication not only allows you to perform mixed-sign
multiplication, it also achieves accurate results for
special operations, such as (-1.0) x (-1.0).
FIGURE 3-1:
DS70652C-page 26
PSV and Table
Control Block
Data Access
Program Memory
Address Latch
Data Latch
Special MCU Features
23
23
dsPIC33FJ16GP101/102
Controller
Interrupt
23
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102 CPU CORE BLOCK
DIAGRAM
to Various Blocks
Control Signals
Decode and
Control
Stack
Instruction
Logic
PCU
Program Counter
Control
24
8
PCH
Control
Logic
Loop
16
PCL
and
Preliminary
16
Y Data Bus
X Data Bus
Divide Support
DSP Engine
Instruction Reg
Data Latch
ROM Latch
Address Generator Units
Address
X RAM
Latch
16
16
The
dsPIC33FJ16MC101/102 supports 16/16 and 32/16
divide operations, both fractional and integer. All divide
instructions are iterative operations. They must be
executed within a REPEAT loop, resulting in a total
execution time of 19 instruction cycles. The divide
operation can be interrupted during any of those
19 cycles without loss of data.
A 40-bit barrel shifter is used to perform up to a 16-bit
left or right shift in a single cycle. The barrel shifter can
be used by both MCU and DSP instructions.
Data Latch
Address
Y RAM
Latch
EA MUX
W Register Array
16
16
16
16 x 16
dsPIC33FJ16GP101/102
16
16-bit ALU
© 2011 Microchip Technology Inc.
16
16
16
To Peripheral Modules
16
and