DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 227

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

23.0
dsPIC33FJ16GP101/102 and dsPIC33FJ16MC101/
102 devices include several features intended to
maximize application flexibility and reliability, and
minimize
components. These are:
• Flexible configuration
• Watchdog Timer (WDT)
• Code Protection
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit emulation
23.1
The Configuration Shadow register bits can be config-
ured (read as ‘0’), or left unprogrammed (read as ‘1’),
to select various device configurations. These read-
only bits are mapped starting at program memory loca-
tion 0xF80000. A detailed explanation of the various bit
functions is provided in
Note that address 0xF80000 is beyond the user pro-
gram memory space and belongs to the configuration
memory space (0x800000-0xFFFFFF) which can only
be accessed using table reads.
© 2011 Microchip Technology Inc.
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
SPECIAL FEATURES
Configuration Bits
cost
of the dsPIC33FJ16GP101/102 and
dsPIC33FJ16MC101/102 devices. It is
not intended to be a comprehensive ref-
erence source. To complement the infor-
mation in this data sheet, refer to Section
24. “Programming and Diagnostics”
(DS70207) and Section 25. “Device
Configuration”
“dsPIC33F/PIC24H Family Reference
Manual”, which are available from the
Microchip
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
through
Table
elimination
23-3.
(DS70194)
web
of
in
external
site
the
Preliminary
in
In dsPIC33FJ16GP101/102 and dsPIC33FJ16MC101/
102 devices, the configuration bytes are implemented as
volatile memory. This means that configuration data
must be programmed each time the device is powered
up. Configuration data is stored in the two words at the
top of the on-chip program memory space, known as the
Flash Configuration Words. Their specific locations are
shown in
of the actual device Configuration bits, whose actual
locations are distributed among several locations in con-
figuration space. The configuration data is automatically
loaded from the Flash Configuration Words to the proper
Configuration registers during device Resets.
When creating applications for these devices, users
should always specifically allocate the location of the
Flash Configuration Word for configuration data. This is
to make certain that program code is not stored in this
address when the code is compiled.
The upper byte of all Flash Configuration Words in pro-
gram memory should always be ‘1111 1111’. This
makes them appear to be NOP instructions in the
remote event that their locations are ever executed by
accident. Since Configuration bits are not implemented
in the corresponding locations, writing ‘1’s to these
locations has no effect on device operation.
Note:
Note:
Table
Configuration data is reloaded on all types
of device Resets.
Performing a page erase operation on the
last page of program memory clears the
Flash Configuration Words, enabling code
protection as a result. Therefore, users
should avoid performing page erase
operations on the last page of program
memory.
23-2. These are packed representations
DS70652C-page 227