DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 229

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 23-3:
© 2011 Microchip Technology Inc.
POSCMD<1:0>
WDTWIN<1:0>
FNOSC<2:0>
FCKSM<1:0>
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
PWMLOCK
OSCIOFNC
IOL1WAY
FWDTEN
WDTPRE
Bit Field
WINDIS
GWRP
IESO
GCP
dsPIC33F CONFIGURATION BITS DESCRIPTION
If clock switch is
enabled, RTSP
effect is on any
device Reset;
RTSP Effect
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
otherwise,
General Segment Code-Protect bit
1 = User program memory is not code-protected
0 = Code protection is enabled for the entire program memory space
General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
Two-speed Oscillator Start-up Enable bit
1 = Start-up device with FRC, then automatically switch to the
0 = Start-up device with user-selected oscillator source
PWM Lock Enable bit
1 = Certain PWM registers may only be written after key sequence
0 = PWM registers may be written without key
Watchdog Window Select bits
11 = WDT Window is 24% of WDT period
10 = WDT Window is 37.5% of WDT period
01 = WDT Window is 50% of WDT period
00 = WDT Window is 75% of WDT period
Oscillator Selection bits
111 = Fast RC Oscillator with divide-by-N (FRCDIVN)
110 = Reserved; do not use
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (Sosc)
011 = Primary Oscillator with PLL module (MS + PLL, EC + PLL)
010 = Primary Oscillator (MS, HS, EC)
001 = Fast RC Oscillator with divide-by-N with PLL module
000 = Fast RC Oscillator (FRC)
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral pin select configuration
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
OSC2 Pin Function bit (except in MS and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode (10 MHz - 32 MHz)
01 = MS Crystal Oscillator mode (3 MHz - 10 MHz)
00 = EC (External Clock) mode (DC - 32 MHz)
Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
0 = Watchdog Timer enabled/disabled by user software (LPRC can be disabled
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
user-selected oscillator source when ready
Clearing the SWDTEN bit in the RCON register will have no effect.)
by clearing the SWDTEN bit in the RCON register)
(FRCDIVN + PLL)
Preliminary
Description
DS70652C-page 229