DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 242

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DSPIC33FJ16MC101T-I/SS

Manufacturer Part Number
DSPIC33FJ16MC101T-I/SS
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ16MC101T-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
TABLE 24-2:
DS70652C-page 242
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
Base
Instr
#
RRNC
SAC
SE
SETM
SFTAC
SL
SUB
SUBB
SUBR
SUBBR
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
ULNK
XOR
ZE
Mnemonic
Assembly
INSTRUCTION SET OVERVIEW (CONTINUED)
RRNC
RRNC
RRNC
SAC
SAC.R
SE
SETM
SETM
SETM
SFTAC
SFTAC
SL
SL
SL
SL
SL
SUB
SUB
SUB
SUB
SUB
SUB
SUBB
SUBB
SUBB
SUBB
SUBB
SUBR
SUBR
SUBR
SUBR
SUBBR
SUBBR
SUBBR
SUBBR
SWAP.b
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
ULNK
XOR
XOR
XOR
XOR
XOR
ZE
f
f,WREG
Ws,Wd
Acc,#Slit4,Wdo
Acc,#Slit4,Wdo
Ws,Wnd
f
WREG
Ws
Acc,Wn
Acc,#Slit6
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
Acc
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
Wn
Wn
Ws,Wd
Ws,Wd
Ws,Wd
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
Ws,Wnd
Assembly Syntax
Preliminary
f = Rotate Right (No Carry) f
WREG = Rotate Right (No Carry) f
Wd = Rotate Right (No Carry) Ws
Store Accumulator
Store Rounded Accumulator
Wnd = sign-extended Ws
f = 0xFFFF
WREG = 0xFFFF
Ws = 0xFFFF
Arithmetic Shift Accumulator by (Wn)
Arithmetic Shift Accumulator by Slit6
f = Left Shift f
WREG = Left Shift f
Wd = Left Shift Ws
Wnd = Left Shift Wb by Wns
Wnd = Left Shift Wb by lit5
Subtract Accumulators
f = f – WREG
WREG = f – WREG
Wn = Wn – lit10
Wd = Wb – Ws
Wd = Wb – lit5
f = f – WREG – (C)
WREG = f – WREG – (C)
Wn = Wn – lit10 – (C)
Wd = Wb – Ws – (C)
Wd = Wb – lit5 – (C)
f = WREG – f
WREG = WREG – f
Wd = Ws – Wb
Wd = lit5 – Wb
f = WREG – f – (C)
WREG = WREG – f – (C)
Wd = Ws – Wb – (C)
Wd = lit5 – Wb – (C)
Wn = nibble swap Wn
Wn = byte swap Wn
Read Prog<23:16> to Wd<7:0>
Read Prog<15:0> to Wd
Write Ws<7:0> to Prog<23:16>
Write Ws to Prog<15:0>
Unlink Frame Pointer
f = f .XOR. WREG
WREG = f .XOR. WREG
Wd = lit10 .XOR. Wd
Wd = Wb .XOR. Ws
Wd = Wb .XOR. lit5
Wnd = Zero-extend Ws
Description
© 2011 Microchip Technology Inc.
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
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1
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1
1
1
1
1
1
1
1
1
2
2
2
2
1
1
1
1
1
1
1
Status Flags
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
OA,OB,OAB,
OA,OB,OAB,
OA,OB,OAB,
SA,SB,SAB
SA,SB,SAB
SA,SB,SAB
C,N,OV,Z
C,N,OV,Z
C,N,OV,Z
Affected
C,N,Z
C,Z,N
None
None
None
None
None
None
None
None
None
None
None
None
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z

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