DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 61

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.6
The
dsPIC33FJ16MC101/102 architecture uses a 24-bit-
wide program space and a 16-bit-wide data space. The
architecture is also a modified Harvard scheme, mean-
ing that data can also be present in the program space.
To use this data successfully, it must be accessed in a
way that preserves the alignment of information in both
spaces.
Aside from normal execution, the dsPIC33FJ16GP101/
102
provides two methods by which program space can be
accessed during operation:
• Using table instructions to access individual
• Remapping a portion of the program space into
Table instructions allow an application to read or write
to small areas of the program memory. This capability
makes the method ideal for accessing data tables that
need to be updated periodically. It also allows access
to all bytes of the program word. The remapping
method allows an application to access a large block of
data on a read-only basis, which is ideal for lookups
from a large table of static data. The application can
only access the lsw of the program word.
TABLE 4-32:
© 2011 Microchip Technology Inc.
Instruction Access
(Code Execution)
TBLRD/TBLWT
(Byte/Word Read/Write)
Program Space Visibility
(Block Remap/Read)
Note 1:
bytes, or words, anywhere in the program space
the data space (Program Space Visibility)
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
and
Access Type
Interfacing Program and Data
Memory Spaces
Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is PSVPAG<0>.
dsPIC33FJ16MC101/102
dsPIC33FJ16GP101/102
PROGRAM SPACE ADDRESS CONSTRUCTION
User
User
Configuration
User
Access
Space
architecture
and
Preliminary
<23>
0
0
0
TBLPAG<7:0>
TBLPAG<7:0>
0xxx xxxx
1xxx xxxx
0xx
4.6.1
Since the address ranges for the data and program
spaces are 16 and 24 bits, respectively, a method is
needed to create a 23-bit or 24-bit program address
from 16-bit data registers. The solution depends on the
interface method to be used.
For table operations, the 8-bit Table Page register
(TBLPAG) is used to define a 32K word region within
the program space. This is concatenated with a 16-bit
EA to arrive at a full 24-bit program space address. In
this format, the MSb of TBLPAG is used to determine if
the
(TBLPAG<7> = 0)
(TBLPAG<7> = 1).
For remapping operations, the 8-bit Program Space
Visibility register (PSVPAG) is used to define a
16K word page in the program space. When the MSb
of the EA is ‘1’, PSVPAG is concatenated with the lower
15 bits of the EA to form a 23-bit program space
address. Unlike table operations, this limits remapping
operations strictly to the user memory area.
Table 4-32
created for table operations and remapping accesses
from the data EA.
<22:16>
xxxx xxxx
PSVPAG<7:0>
xxxx
operation
Program Space Address
and
ADDRESSING PROGRAM SPACE
xxxx
PC<22:1>
Figure 4-7
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
<15>
occurs
or
xxxx
the
show how the program EA is
xxx xxxx xxxx xxxx
Data EA<15:0>
Data EA<15:0>
in
xxxx xxx0
configuration
<14:1>
Data EA<14:0>
the
DS70652C-page 61
user
memory
memory
(1)
<0>
0