DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 311

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPENDIX A:
Revision A (January 2011)
This is the initial released version of this document.
Revision B (February 2011)
All major changes are referenced by their respective
section in
In addition, minor text and formatting changes were
incorporated throughout the document.
TABLE A-1:
© 2011 Microchip Technology Inc.
“High-Performance, Ultra Low Cost 16-bit
Digital Signal
Section 1.0 “Device Overview”
Section 4.0 “Memory Organization”
Section 6.0 “Resets”
Section 15.0 “Motor Control PWM Module”
Section 17.0 “Inter-Integrated Circuit™
(I
Section 23.0 “Special Features”
Section 26.0 “Electrical Characteristics”
Section 27.0 “Packaging Information”
2
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
C™)”
Table
Controllers”
A-1.
Section Name
MAJOR SECTION UPDATES
REVISION HISTORY
Pin diagram updates (see
• 20-pin PDIP/SOIC/SSOP (dsPIC33FJ16MC101):
• 28-pin SPDIP/SOIC/SSOP (dsPIC33FJ16MC102):
• 28-pin QFN (dsPIC33FJ16MC102):
• 36-pin TLA (dsPIC33FJ16MC102):
Added Notes 1, 2, and 3 regarding the FLTA1 and FLTB1 pins to the
Pinout I/O Descriptions (see
Added
Updated All Resets value for PxFLTACON and PxFLTABCON to the
6-Output PWM1 Register Map (see
Added Note 1 to the PMD Register Map (see
Removed reset timing sequence information from
“System
Added Note 2 and Note 3 regarding the FLTA1 and FLTB1 pins to the
6-channel PWM Module Block Diagram (see
Added
protected
Added Note 2 and Note 3 regarding the FLTA1 and FLTB1 pins to the
note boxes located below the PxFLTACON and PxFLTBCON
registers (see
Updated the descriptions for the conditional If STREN = 1 and If
STREN = 0 statements for the SCLREL bit in the I2Cx Control
Register (see
Added the RTSP Effect column to the dsPIC33F Configuration Bits
Description (see
Added parameters 300 and D305 (see
Modified the pending TLA packaging page.
Removed the FLTB1 pin from pin 10
Relocated the FLTB1 pin from pin 12 to pin 14;
relocated the FLTA1 pin from pin 16 to pin 15
Relocated the FLTA1 pin from pin 13 to pin 12;
relocated the FLTB1 pin from pin 9 to pin 11
Relocated the FLTA1 pin from pin 17 to pin 16;
relocated the FLTB1 pin from pin 10 to pin 15
Preliminary
Section 1.1 “Referenced
Section 15.2 “PWM Faults”
Reset”, as this information is provided in
Registers”.
Register
Register 15-9
Table
17-1).
23-3).
Update Description
“Pin
and
Table
Diagrams”):
Register
Sources”.
1-1).
Table
and
Table 26-42
Section 15.3 “Write-
4-9).
15-10).
Figure
Table
Section 6.1
DS70652C-page 311
Figure
4-29).
and
15-1).
Table
6-2.
26-43).