DSPIC33FJ16MC101T-I/SS Microchip Technology, DSPIC33FJ16MC101T-I/SS Datasheet - Page 235

• Manufacturer Part Number: DSPIC33FJ16MC101T-I/SS
• Description: 16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC101T-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

24.0
The dsPIC33F instruction set is identical to that of the
dsPIC30F.
Most instructions are a single program memory word
(24 bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word, divided
into an 8-bit opcode, which specifies the instruction
type and one or more operands, which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
• Word or byte-oriented operations
• Bit-oriented operations
• Literal operations
• DSP operations
• Control operations
Table 24-1
describing the instructions.
The dsPIC33F instruction set summary in
lists all the instructions, along with the status flags
affected by each instruction.
Most word or byte-oriented W register instructions
(including
operands:
• The first source operand, which is typically a
• The second source operand, which is typically a
• The destination of the result, which is typically a
However, word or byte-oriented file register instructions
have two operands:
• The file register specified by the value ‘f’
• The destination, which could be either the file
© 2011 Microchip Technology Inc.
Note:
register ‘Wb’ without any address modifier
register ‘Ws’ with or without an address modifier
register ‘Wd’ with or without an address modifier
register ‘f’ or the W0 register, which is denoted as
‘WREG’
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
INSTRUCTION SET SUMMARY
This data sheet summarizes the features
of
dsPIC33FJ16MC101/102
However, it is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to the latest family reference
sections of the “dsPIC33F/PIC24H Family
Reference Manual”, which are available
from
(www.microchip.com).
barrel
shows the general symbols used in
the
the
shift
dsPIC33FJ16GP101/102
instructions)
Microchip
web
have
Table 24-2
devices.
three
and
site
Preliminary
Most bit-oriented instructions (including simple rotate/
shift instructions) have two operands:
• The W register (with or without an address
• The bit in the W register or file register (specified
The literal instructions that involve data movement can
use some of the following operands:
• A literal value to be loaded into a W register or file
• The W register or file register where the literal
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
• The first source operand, which is a register ‘Wb’
• The second source operand, which is a literal
• The destination of the result (only if not the same
The MAC class of DSP instructions can use some of the
following operands:
• The accumulator (A or B) to be used (required
• The W registers to be used as the two operands
• The X and Y address space prefetch operations
• The X and Y address space prefetch destinations
• The accumulator write back destination
The other DSP instructions do not involve any
multiplication and can include:
• The accumulator to be used (required)
• The source or destination operand (designated as
• The amount of shift specified by a W register ‘Wn’
The control instructions can use some of the following
operands:
• A program memory address
• The mode of the table read and table write
modifier) or file register (specified by the value of
‘Ws’ or ‘f’)
by a literal value or indirectly by the contents of
register ‘Wb’)
register (specified by ‘k’)
value is to be loaded (specified by ‘Wb’ or ‘f’)
without any address modifier
value
as the first source operand), which is typically a
register ‘Wd’ with or without an address modifier
operand)
Wso or Wdo, respectively) with or without an
address modifier
or a literal value
instructions
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