PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 118

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P

PIC16F1829-E/P

Manufacturer Part Number
PIC16F1829-E/P
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16F1829-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16F182x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1825/1829
11.4
When modifying existing data in a program memory
row, and data within that row must be preserved, it must
first be read and saved in a RAM image. Program
memory is modified using the following steps:
1.
2.
3.
4.
5.
6.
7.
8.
TABLE 11-2:
EXAMPLE 11-3:
DS41440A-page 118
* This code block will read 1 word of program memory at the memory address:
*
*
Load the starting address of the row to be
modified.
Read the existing data from the row into a RAM
image.
Modify the RAM image to contain the new data
to be written into program memory.
Load the starting address of the row to be
rewritten.
Erase the program memory row.
Load the write latches with data from the RAM
image.
Initiate a programming operation.
Repeat steps 6 and 7 as many times as required
to reprogram the erased row.
PROG_ADDR_LO (must be 00h-08h) data will be returned in the variables;
PROG_DATA_HI, PROG_DATA_LO
BANKSEL
MOVLW
MOVWF
CLRF
BSF
BCF
BSF
NOP
NOP
BSF
MOVF
MOVWF
MOVF
MOVWF
Modifying Flash Program Memory
8000h-8003h
8007h-8008h
Address
8006h
EEADRL
PROG_ADDR_LO
EEADRL
EEADRH
EECON1,CFGS
INTCON,GIE
EECON1,RD
INTCON,GIE
EEDATL,W
PROG_DATA_LO
EEDATH,W
PROG_DATA_HI
USER ID, DEVICE ID AND CONFIGURATION WORD ACCESS (CFGS = 1)
CONFIGURATION WORD AND DEVICE ID ACCESS
Configuration Words 1 and 2
Device ID/Revision ID
; Select correct Bank
;
; Store LSB of address
; Clear MSB of address
; Select Configuration Space
; Disable interrupts
; Initiate read
; Executed (See
; Ignored (See
; Restore interrupts
; Get LSB of word
; Store in user location
; Get MSB of word
; Store in user location
Function
User IDs
Preliminary
Figure
Figure
11-1)
11.5
Instead of accessing program memory or EEPROM
data memory, the User ID’s, Device ID/Revision ID and
Configuration Words can be accessed when CFGS = 1
in the EECON1 register. This is the region that would
be pointed to by PC<15> = 1, but not all addresses are
accessible. Different access may exist for reads and
writes. Refer to
When read access is initiated on an address outside the
parameters listed in
register pair is cleared.
11-1)
Read Access
User ID, Device ID and
Configuration Word Access
Yes
Yes
Yes
Table
Table
11-2.
 2010 Microchip Technology Inc.
11-2, the EEDATH:EEDATL
Write Access
Yes
No
No

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