PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 243

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P

PIC16F1829-E/P

Manufacturer Part Number
PIC16F1829-E/P
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16F1829-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16F182x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
25.0
25.1
The Master Synchronous Serial Port (MSSPx) module
is a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSPx module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The SPI interface supports the following modes and
features:
• Master mode
• Slave mode
• Clock Parity
• Slave Select Synchronization (Slave mode only)
• Daisy chain connection of slave devices
Figure 25-1
module.
FIGURE 25-1:
 2010 Microchip Technology Inc.
MASTER SYNCHRONOUS
SERIAL PORT (MSSP1 AND
MSSP2) MODULE
Master SSPx (MSSPx) Module
Overview
is a block diagram of the SPI interface
MSSPX BLOCK DIAGRAM (SPI MODE)
2
C™)
SCKx
SDOx
SDIx
SSx
Read
SSx Control
TRIS bit
bit 0
Enable
Select
Select
Edge
Edge
Preliminary
SSPxBUF Reg
SSPxSR Reg
SSPxM<3:0>
4
PIC16F/LF1825/1829
Clock
Shift
Write
(
(SSPxADD)
Prescaler
Baud Rate
Data Bus
4, 16, 64
Generator
TMR2 Output
2 (CKP, CKE)
2
Clock Select
T
OSC
)
DS41440A-page 245

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