MT29F8G08ABABAWP:B Micron Technology Inc, MT29F8G08ABABAWP:B Datasheet - Page 102

• Manufacturer Part Number: MT29F8G08ABABAWP:B
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP:B

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Timing Diagrams
Synchronous Interface
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
W/R#
R/B#
DQS
DQx
CE#
ALE
CLK
CLE
t CS
Notes:
t CAD
2.
3.
4. The cycle that tCAD is measured from may be an idle cycle (as shown), another command
1. When CE# remains LOW,
EFh
data byte is input for the subsequent command or data input cycle(s).
t
t
cycle, and address cycle, or a data cycle. The idle cycle is shown in this diagram for simplicity.
DSH (MIN) generally occurs during
DSS (MIN) generally occurs during
t CAD
Addr
Addr
Feat
Feat
t CAD
Micron Confidential and Proprietary
t CALS
8Gb Asychronous/Synchronous NAND Flash Memory
t DQSS
t
CAD begins at the rising edge of the clock from which the last
P1
102
0
P1
1
t
t
DQSS (MAX).
DQSS (MIN).
P2
0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
P2
1
P3
0
P3
1
t CALS
P4
0
P4
1
t WB
©2008 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t FEAT
Don’t Care
Advance