MT29F8G08ABABAWP:B Micron Technology Inc, MT29F8G08ABABAWP:B Datasheet - Page 77

• Manufacturer Part Number: MT29F8G08ABABAWP:B
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP:B

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ERASE BLOCK MULTI-PLANE (60h–D1h)
Figure 51:
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m61a_async_sync_nand.fm - Rev. A 2/09 EN
ERASE BLOCK MULTI-PLANE (60h–D1h) Operation
The ERASE BLOCK MULTI-PLANE (60h-D1h) command queues a block in the specified
plane to be erased in the NAND Flash array. This command can be issued one or more
times. Each time a new plane address is specified, that plane is also queued for a block to
be erased. To specify the final block to be erased and to begin the erase operation for all
previously queued planes, issue the ERASE BLOCK (60h-D0h) command. This
command is accepted by the LUN when it is ready (RDY = 1, ARDY = 1).
To queue a block to be erased, write 60h to the command register, then write three
address cycles containing the row address; the page address is ignored. Conclude by
writing D1h to the command register. The selected LUN will go busy (RDY = 0, ARDY = 0)
for
To determine the progress of
alternatively, the status operations (70h, 78h) can be used. When the LUN's status shows
that it is ready (RDY = 1, ARDY = 1), additional ERASE BLOCK MULTI-PLANE (60h-D1h)
commands can be issued to queue additional planes for erase. Alternatively, the ERASE
BLOCK (60h-D0h) command can be issued to erase all of the queued blocks.
For the ERASE BLOCK MULTI-PLANE (60h-D1h) and ERASE BLOCK (60h-D0h)
commands, see “Multi-Plane Addressing” on page 86 for multi-plane addressing
requirements.
I/O[7:0] (DQ[7:0])
t
DBSY.
Cycle type
RDY
Micron Confidential and Proprietary
Command
8Gb Asychronous/Synchronous NAND Flash Memory
60h
Address
t
R1
77
DBSY, the host can monitor the target's R/B# signal, or
Address
R2
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Address
R3
Command
D1h
t WB
Command Definitions
t DBSY
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Command
60h
Address
Advance
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