TE28F640J3D75 Intel, TE28F640J3D75 Datasheet - Page 41

• Manufacturer Part Number: TE28F640J3D75
• Manufacturer: Intel

Specifications of TE28F640J3D75

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 75ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 23/22Bit
• Operating Supply Voltage (typ): 3/3.3V
• Sync/async: Asynchronous
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 8M/4Mword
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

Numonyx™ Embedded Flash Memory (J3 v. D)
9.5
Note:
Table 23: Suspend and Resume Command Bus-Cycles
Note:
Table 24: Valid Commands During Suspend (Sheet 1 of 2)
November 2007
308551-05
Suspend
Resume
STS Configuration
Read Array
Read Status Register
Clear Status Register
Read Device Information
CFI Query
Word Program
Buffered Program
Block Erase
Program Suspend
Standby power levels are not be realized until the block-erase operation has finished.
Also, asserting RP# aborts the block-erase operation, and array contents at the
addressed location are indeterminate. The addressed block should be erased before
programming within the block is attempted.
Suspend and Resume
An erase or programming operation can be suspended to perform other operations, and
then subsequently resumed.
cycles.
All erase and programming operations require the addressed block to remain unlocked
with a valid voltage applied to VPEN throughout the suspend operation. Otherwise, the
block-erase or programming operation will abort, setting the appropriate Status
Register error bit(s). Also, asserting RP# aborts suspended block-erase and
programming operations, rendering array contents at the addressed location(s)
indeterminate.
In case of 256 Mb device (2x128), the command should be issued to the base address of the die
To suspend an on-going erase or program operation, issue the Suspend command to
any device address. The program or erase operation suspends at pre-determined points
during the operation after a delay of t
mode) goes high, SR[7,6] = 1 (erase-suspend) or SR[7,2] = 1 (program-suspend).
Issuing the Suspend command does not change the read mode of the device. The
device will be in Read Status Register mode from when the erase or program command
was first issued, unless the read mode was changed prior to issuing the Suspend
command.
Not all commands are allowed when the device is suspended.
device commands are allowed during Program Suspend or Erase Suspend.
Device Command
Command
Table 23
Device Address
Device Address
Address Bus
Setup Write Cycle
Program Suspend
SUSP
shows the Suspend and Resume command bus-
Not Allowed
Not Allowed
Not Allowed
Not Allowed
Allowed
Allowed
Allowed
Allowed
Allowed
Allowed
. Suspend is achieved whenSTS (in RY/BY#
Data Bus
00B0h
00D0h
Address Bus
Table 24
Confirm Write Cycle
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Erase Suspend
Not Allowed
Allowed
Allowed
Allowed
Allowed
Allowed
Allowed
Allowed
Allowed
Allowed
shows which
Data Bus
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Datasheet
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