TE28F640J3D75

Manufacturer Part NumberTE28F640J3D75
ManufacturerIntel
TE28F640J3D75 datasheet
 


Specifications of TE28F640J3D75

Cell TypeNORDensity64Mb
Access Time (max)75nsInterface TypeParallel
Boot TypeNot RequiredAddress Bus23/22Bit
Operating Supply Voltage (typ)3/3.3VSync/asyncAsynchronous
Package TypeTSOPProgram/erase Volt (typ)2.7 to 3.6V
Operating Temp Range-40C to 85COperating Temperature ClassificationIndustrial
Operating Supply Voltage (min)2.7VOperating Supply Voltage (max)3.6V
Word Size8/16BitNumber Of Words8M/4Mword
MountingSurface MountPin Count56
Lead Free Status / Rohs StatusNot Compliant  
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Numonyx™ Embedded Flash Memory (J3 v. D)
13.5
System Interface Information
The following device information can optimize system interface software.
Table 37: System Interface Information
Offset
Length
V
logic supply minimum program/erase voltage
CC
1Bh
1
bits 0–3 BCD 100 mV
bits 4–7 BCD volts
V
logic supply maximum program/erase voltage
CC
1Ch
1
bits 0–3 BCD 100 mV
bits 4–7 BCD volts
V
[programming] supply minimum program/erase voltage
PP
1Dh
1
bits 0–3 BCD 100 mV
bits 4–7 HEX volts
V
[programming] supply maximum program/erase voltage
PP
1Eh
1
bits 0–3 BCD 100 mV
bits 4–7 HEX volts
1Fh
1
“n” such that typical single word program time-out = 2
20h
1
“n” such that typical max. buffer write time-out = 2
21h
1
“n” such that typical block erase time-out = 2
22h
1
“n” such that typical full chip erase time-out = 2
23h
1
“n” such that maximum word program time-out = 2
24h
1
“n” such that maximum buffer write time-out = 2
25h
1
“n” such that maximum block erase time-out = 2
26h
1
“n” such that maximum chip erase time-out = 2
13.6
Device Geometry Definition
This field provides critical details of the flash device geometry.
Table 38: Device Geometry Definition
Offset
Length
27h
1
“n” such that device size = 2
28h
2
Flash device interface:
2Ah
2
“n” such that maximum number of bytes in write buffer = 2
Number of erase block regions within device:
1. x = 0 means no erase blocking; the device erases in “bulk”
2. x specifies the number of device or partition regions with one or more
2Ch
1
contiguous same-size erase blocks
3. Symmetrically blocked partitions have one blocking region
4. Partition size = (total blocks) x (individual block size)
Erase Block Region 1 Information
bits 0–15 = y, y+1 = number of identical-size erase blocks
2Dh
4
bits 16–31 = z, region erase block(s) size are z x 256 bytes
November 2007
308551-05
Description
n
µs
n
µs
n
ms
n
ms
n
times typical
n
times typical
n
times typical
n
times typical
Description
n
in number of bytes
x8 async
x16 async x8/x16 async
28:00,29:00 28:01,29:00 28:02,29:00
n
Hex
Add.
Value
Code
1B:
--27
2.7 V
1C:
--36
3.6 V
1D:
--00
0.0 V
1E:
--00
0.0 V
1F:
--06
64 µs
20:
--07
128 µs
21:
--0A
1 s
22:
--00
NA
23:
--02
256 µs
24:
--03
1024 µs
25:
--02
4 s
26:
--00
NA
Code See Table Below
27:
x8/
28:
--02
x16
29:
--00
2A:
--05
32
2B:
--00
2C:
--01
1
2D:
2E:
2F:
30:
Datasheet
61