AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 146
AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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Figure 74. Formats and States in the Slave Transmitter Mode
Table 44. Status Codes for Miscellaneous States
146
(TWSR)
Status
Code
$F8
$00
Reception of the own
slave address and one or
more data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
AT94K Series FPSLIC
Status of the 2-wire
Serial Bus and 2-wire
Serial Hardware
No relevant state
information available;
TWINT = “0”
Bus error due to an
illegal START or STOP
condition
From master to slave
From slave to master
S
To/From TWDR
No TWDR action
No TWDR action
SLA
Application Software Response
R
DATA
STA
$A8
$B0
A
A
0
n
No TWCR action
STO
A
1
To TWCR
DATA
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-wire serial bus
TWINT
1
$B8
TWEA
A
X
DATA
Next Action Taken by 2-wire
Serial Hardware
Wait or proceed current transfer
Only the internal hardware is affected; no
STOP condition is sent on the bus. In all
cases, the bus is released and TWSTO is
cleared.
$C0
$C8
A
A
P or S
All 1's
Rev. 1138F–FPSLI–06/02
P or S
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